As the speed and file capacity of work stations in personal computers increases, the demand for high resolution intelligent display adapters also increases. Large graphic applications formerly limited to mainframe computers having dedicated graphic display terminals can use this increased capability in the adapters to migrate their graphic applications to stand alone systems. The present invention describes functions that can be incorporated into a video display adapter to provide, in stand alone work stations, the graphic functions and performance required by such complex graphic applications.
Such increased capability display adapters are especially needed for such small stand alone systems as the IBM PC/AT and the IBM RT-PC which can provide high-performance, moderate-cost adapter functions which cover a very broad spectrum of applications.
A primary requirement for a stand alone video adapter is the capability of generating vectors with a minimum of intervention by the host computer system. Vector drawing in raster displays usually provides satisfactory performance in just one direction of drawing, since the frame buffer architecture usually allows a parallel access to several pixels only along the horizontal axis.
Sloped vectors in such displays are conventionally drawn pixel wise. If a picture or display includes a large number of sloped vectors, which is the case in CAD/CAM computer graphics, the overall system performance is greatly degraded.
In order to increase performance, several other approaches have been used in the past.
The simplest way is to provide a parallel access to the frame buffer in two directions. It is an expensive, but efficient method, if the probability of using sloped vectors is small compared to horizontal and vertical lines.
Next, sloped vectors can include multipixel horizontal segments, especially if its slope to a preferable axis is small. Based on that fact, the frame buffer may be accessed in parallel or pixel wise, depending on whether a vector segment is parallel to a preferable axis, or not. Another solution is to use an extra small and fast cache memory in order to draw segments, and then copy the cache data into the frame buffer in page mode.
Advances in hardware design now make it possible to modify frame buffer addressing, depending on the vector slope, in order to provide parallel access to memory cells not positioned along the axis.
All of the above referenced approaches have significant disadvantages. The first two do not increase performance satisfactorily, e.g., for CAD/CAM systems. Also, the drawing time depends on the nature of the drawing itself, which is inconvenient in the case of geometric picture transformations, especially real time rotation. The last two methods require very complicated extra hardware.
Contemporary raster display architectures frequently include built-in hardware to boost performance and facilitate programming. In particular, the three most common features frequently used are:
built-in bit-blt address control, PA1 built-in vector generator, and PA1 all-points addressable (APA) frame buffer with two axes independent square access.
The first feature is quite convenient for area copy or modification, but does not add much to the vector drawing performance.
The built-in vector generator still cannot provide an equal performance independently of vector slope, although it helps to some extent by partially eliminating software codes.
The problem is even more complicated if known APA architectures are employed. This requires a complicated hardware manipulation of addresses and data, so the additional modification of hardware to boost the vector drawing performance is either too expensive or not practically achievable.